Closed GoogleCodeExporter closed 9 years ago
Thanks for the bug report. I only have an Intel CPU at hand, and the result
with SSE1
is correct. I'll give it a try on and Athlon. Does it need to be a K7 (without
SSE2
support) or does an Athlon64 reproduce the issue too?
Original comment by cast...@gmail.com
on 14 Dec 2007 at 7:32
I haven't been able to reproduce the issue on an AMD Athlon XP, or an Athlon64.
In
both cases, with SSE only enabled, the result was the expected. Are you sure
that
your CPU has support for the SSE instruction set? Note that the first Athlon's
(Athlon-tbird) did only support the SSE prefetch instruction, but not the full
SSE
instruction set. Could that be your case?
Original comment by cast...@gmail.com
on 6 Jan 2008 at 1:59
Original comment by cast...@gmail.com
on 3 Feb 2008 at 7:24
Original issue reported on code.google.com by
Adrian.L...@gmail.com
on 14 Dec 2007 at 2:41