Dynamic CPU feature detection

[arpankapoor]

Would you consider a PR to add separate functions for XXH3 that choose the implementation at runtime using is_x86_feature_detected!/is_aarch64_feature_detected.

Since this would add a small overhead at runtime (an atomic store of the function pointer in a static variable on first invocation and an atomic load on every subsequent call), these new functions can be guarded behind a feature.

[DoumanAsh]

This is actually a bit more complicated since right now hardware specific functions are bound to compile time feature detection

I guess there is no issue to add it, but it is actually pretty much redundant for SSE2 and NEON since all x86_64/aarch64 chips should have respective instructions available by default Meanwhile web SIMD requires compile time flag always

AVX2 might be the only feature set that benefits from it