EPFL-LAP / dynamatic

DHLS (Dynamic High-Level Synthesis) compiler based on MLIR
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[RTL] fixed control_merge.vhd #159

Closed shundroid closed 1 month ago

shundroid commented 1 month ago

I'm working on adding a spec bit on each RTL module. I found that the current control_merge.vhd didn't work, so I fixed this.

Note: control_merge.vhd will be referenced by the dataless version of control_merge with a spec bit, as it treats the extra bit as 1-bit data.

shundroid commented 1 month ago

But it may be used if we want to combine extra bits (including the speculative bit) with control tokens (just note!)