EPFL-LAP / dynamatic

DHLS (Dynamic High-Level Synthesis) compiler based on MLIR
Other
60 stars 18 forks source link

[export-vhdl] fixing wrong assumption .DOT format #69

Closed Jiahui17 closed 7 months ago

Jiahui17 commented 7 months ago

This PR fixes a bug caused by export-vhdl assuming that the components in a connection must be parsed before.

Previously, when generating .DOT files, all the edges were dumped after all the nodes, therefore, this bug was never triggered.

This causes integration-test/if_loop_1 to crush export-vhdl