This PR adds open source floating-point arithmetic generated by FloPoCo to the library of Dynamatic as an alternative to Vivado floating-point arithmetic units.
The following files were added to data/vhdl/:
float_arithmetic_flopoco.vhd : This file is meant to extend arithmetic_units.vhd. It includes arithmetic unit wrappers which use arithmetic units generated by FloPoCo instead of relying on Vivado (for some but not all components). The following floating-point operations are replaced: addition, subtraction, multiplication, division, and ordered comparisons.
float_arithmetic_vivado.vhd : This file contains the arithmetic unit wrappers, that rely on Vivado. These units were previously stored in arithmetic_units.vhd.
There is also a new simple integration test for testing certain floating-point operations at integration_test/float_basic.
Note that the new operators are intended support a frequency of 250 MHz.
Note also that this PR merely introduces some open source floating-point arithmetic units, which are not used by default by Dynamatic.
How to test
In order to test the new VHDL code, the arithmetic units in the generated VHDL code need to be replaced manually and the simulation.do file needs to be modified.
Generate VHDL code for the integration test float_basic.
Copy float_arithmetic_flopoco.vhd to integration-test/float_basic/out/sim/VHDL_SRC/.
Modify the file integration-test/float_basic/out/sim/HLS_VERIFY/simulation.do.
Add the following lines:
project addfile ../VHDL_SRC/float_arithmetic_flopoco.vhd
Make sure arithmetic_units.vhd does not contain duplicate floating-point units.
Remove the directory integration-test/float_basic/out/sim/HLS_VERIFY/work.
Change directory to integration-test/float_basic/out/sim/HLS_VERIFY and run the simulation with vsim -c -do simulation.do. The simulation should complete successfully.
Compare the contents of the directories integration-test/float_basic/out/sim/VHDL_OUT and integration-test/float_basic/out/sim/C_OUT and make sure the contents of the files are identical.
This PR adds open source floating-point arithmetic generated by FloPoCo to the library of Dynamatic as an alternative to Vivado floating-point arithmetic units.
The following files were added to
data/vhdl/:arithmetic_units.vhd. It includes arithmetic unit wrappers which use arithmetic units generated by FloPoCo instead of relying on Vivado (for some but not all components). The following floating-point operations are replaced: addition, subtraction, multiplication, division, and ordered comparisons.arithmetic_units.vhd.There is also a new simple integration test for testing certain floating-point operations at
integration_test/float_basic. Note that the new operators are intended support a frequency of 250 MHz. Note also that this PR merely introduces some open source floating-point arithmetic units, which are not used by default by Dynamatic.How to test In order to test the new VHDL code, the arithmetic units in the generated VHDL code need to be replaced manually and the simulation.do file needs to be modified.
float_basic.float_arithmetic_flopoco.vhdtointegration-test/float_basic/out/sim/VHDL_SRC/.integration-test/float_basic/out/sim/HLS_VERIFY/simulation.do. Add the following lines:project addfile ../VHDL_SRC/float_arithmetic_flopoco.vhdMake surearithmetic_units.vhddoes not contain duplicate floating-point units.integration-test/float_basic/out/sim/HLS_VERIFY/work.integration-test/float_basic/out/sim/HLS_VERIFYand run the simulation withvsim -c -do simulation.do. The simulation should complete successfully.integration-test/float_basic/out/sim/VHDL_OUTandintegration-test/float_basic/out/sim/C_OUTand make sure the contents of the files are identical.