Tracking issue for circuit/memory interface redesign, described in this specification.
Clean up our existing circuit interface.
[x] Delete the handshake::ReturnOp operation, which has no real purpose (daff034).
[x] Rework the handshake::EndOp operation. It should just indicate which values are the Handshake's function output ports, and should not map to some RTL component down the line (9f01807).
[x] Make the CfToHandshake conversion pass instantiate the new proposed circuit interface, and adapt the rest of the flow to them (including the HLS verifier) (9f01807).
use control flow decisions to determine when no more accesses will be issued ,
expose start/end ports with the correct semantics w.r.t. the specification, and
use elastic ports to external memories instead of non-elastic dual-port-BRAM-like ports.
In the Handshake to HW lowering (both moved to #143).
[ ] Make the process of creating memory converters between "internal ad-hoc interfaces" to "external standard interfaces" more general and easier to use than it is today.
[ ] Move memory interface lowering in a separate pass to improve modularity.
Tracking issue for circuit/memory interface redesign, described in this specification.
handshake::ReturnOp
operation, which has no real purpose (daff034).handshake::EndOp
operation. It should just indicate which values are the Handshake's function output ports, and should not map to some RTL component down the line (9f01807).CfToHandshake
conversion pass instantiate the new proposed circuit interface, and adapt the rest of the flow to them (including the HLS verifier) (9f01807).handshake::MemoryControllerOp
,handshake::LSQOp
) RTL implementations to (9f01807)