Added PE layouts for derecho, removed PE layouts for cheyenne, and updated testlist to move cheyenne_intel tests to derecho_intel and remove all other cheyenne tests (intel is only supported compiler for 2.2.z). I also updated generate_pop_decomp.xml to include a 128 PE layout for the gx3v7 grid as well as some large PE layouts for tx0.1v3.
Testing:
I ran aux_pop and verified that all tests ran successfully. I also did some performance testing, and can report the following throughput in different configurations (from SMS_Ld20 and SMS_Ld20_D tests using the pop/performance_eval testmod directory)
Resolution
C compset
G compset
C1850ECO compset
G 1850ECO compset
T62_g37
388.97 SYPD
338.97 SYPD
120.49 SYPD
126.08 SYPD
T62_g17
57.43 SYPD
57.24 SYPD
29.83 SYPD
28.79 SYPD
T62_g37 (DEBUG)
45.26 SYPD
48.49 SYPD
8.73 SYPD
8.82 SYPD
T62_g17 (DEBUG)
5.71 SYPD
5.75 SYPD
2.43 SYPD
2.44 SYPD
Test status: bit-for-bit doesn't make sense in context of adding a new machine
User interface (namelist or namelist defaults) changes? None
Description of changes:
Added PE layouts for derecho, removed PE layouts for cheyenne, and updated testlist to move
cheyenne_inteltests toderecho_inteland remove all other cheyenne tests (intelis only supported compiler for 2.2.z). I also updatedgenerate_pop_decomp.xmlto include a 128 PE layout for thegx3v7grid as well as some large PE layouts fortx0.1v3.Testing:
I ran
aux_popand verified that all tests ran successfully. I also did some performance testing, and can report the following throughput in different configurations (fromSMS_Ld20andSMS_Ld20_Dtests using thepop/performance_evaltestmod directory)Test status: bit-for-bit doesn't make sense in context of adding a new machine
User interface (namelist or namelist defaults) changes? None