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Soft reset emulation #70

Open GoogleCodeExporter opened 9 years ago

GoogleCodeExporter commented 9 years ago
Gens currently has only one reset function, which is meant to emulate a
hard-reset (turning the power off and back on).
Certain games (such as X-Men) require a soft reset (which does not clear
the scratch RAM or system registers), in order to complete. Certain other
games could benefit from save and a soft reset in order to skip cutscenes
or otherwise make faster progress.

Original issue reported on code.google.com by Upth...@gmail.com on 24 Mar 2009 at 8:10

GoogleCodeExporter commented 9 years ago
I thought it was in fact a soft reset. It leaves a good amount of emulation 
state
uncleared, at least, which I thought a full power cycle doesn't do. To play a 
movie
"from start" Gens has to bypass the reset function and do a full unload+load. In
other words, Init_Genesis==HardReset, Reset_Genesis==Soft(er?)Reset.

Original comment by nitsuja-@hotmail.com on 25 Mar 2009 at 4:31

GoogleCodeExporter commented 9 years ago
Load the savestate and try the "Reset 68000" menu item. It does work. "Hard 
reset"
does not though.

Original comment by dammi...@hotmail.com on 2 Apr 2009 at 5:23

Attachments:

GoogleCodeExporter commented 9 years ago
So maybe we already have a functional implementation of "Soft reset" which is to
simply do what "Reset 68000" does? I'm not sure what should happen in the case 
of
Sega CD or 32X though, or if they even have a soft reset that's different from 
their
hard reset.

Original comment by nitsuja-@hotmail.com on 8 Jun 2009 at 2:20

GoogleCodeExporter commented 9 years ago
It is unfortunately difficult to find documentation of the soft reset process 
that
occurs on genesis/MegaDrive hardware. I know that it sends a hardware signal 
which
causes the 68000 to reset without clearing RAM, but I don't know what other
components are or are not affected by the process (VDP, Z80, I/O registers). The
Reset 68000 is incomplete at best, because it will not fully reset emulated 32X 
or
SegaCD consoles, which have additional processors.

Original comment by Upth...@gmail.com on 8 Jun 2009 at 4:53

GoogleCodeExporter commented 9 years ago
Here is some information on soft resets I got from talking to Tiido/TmEE:

"The general process is that reset button goes to some ASIC where the signal is 
debounced and the ASIC will spit out the real reset signal (VRES).
There's also the Power On Reset (MRES, SRES) signal that does initial reset, 
that one also resets the VDP and IO chip, and is also fed to MegaCD in inverted 
form (FRES). MegaCD will not see further resets from MD side.

32X sees both SRES and VRES. The 32X generates its own power on reset and it 
overrides SRES on MD side, so 32X can extend power on reset until its own is 
ready, ensuring proper operation. 32X does react to VRES too, but what exctly 
happens I don't know.

I have not done a whole lot with 32X and done nothing with MCD as far as 
programming goes."

He gave me some links, one to a forum thread 
(http://gendev.spritesmind.net/forum/viewtopic.php?t=1262) and several for chip 
schematics.

The thread lists the time that VRES stays asserted and that there is an 
additional signal (ZRES) that is asserted at the same time as VRES and goes to 
the z80 and the ym2612. ZRES does not get deasserted on its own; the 68k needs 
to deassert it after the reset.

In a nutshell, for a soft reset:
* for plain Genesis: VRES is fed to 68000 for 128 VCLKs (16.7us); ZRES is fed 
to the z80 and ym2612, and remains asserted until the 68000 does something to 
deassert it; VDP and IO chip are unaffected.
* for Sega CD: soft resets reset only the Genesis side, as above, except for 
the initial power-on reset.
* for 32X, there is little information as far as soft resets go.

Researching based on this information, I came up with:

From the M68000UM.PDF document, the reset loads the longword at $000000 into 
the supervisor stack pointer, then reads the longword at $000004 into PC, then 
initializes the interrupt level in the status register to 7. No other registers 
are affected by a reset.

From the Z80UM.PDF document, a reset clears the interrupt enable, PC and 
registers I and R, then sets interrupt status to mode 0.

I couldn't find any solid information on the behavior of the ym2612 under 
reset, except for "System reset, initialize registers".

Anyway, I am adding this information here for later use.

Original comment by marz...@gmail.com on 2 Nov 2013 at 9:27