Running testbenchs from rfnoc example for other usrp device (e.g. N310)

Issue Description

When trying to run the testbench for the example rfnoc module, it was configured for the USRP X310. As I am using the USRP N310, I at first installed Xilinx Vivado with only Zync device support (so I had no device support installed for the FPGA used in the x310). I changed the UHD_FPGA_DEFAULT_DEVICE from x310 to n310 in my CMakeLists.txt, but make testbenches still tried to compile for the fpga that is used in the x310. The cause seems to be, that viv_sim_preamble.mak always assigns that part_id as the default. (There is a TODO note above, that suggests, that PART_ID should be set from setupenv.sh, but that's currently not the case.) Running ARCH=zynq PART_ID=xc7z100/ffg900/-2 make testbenches actually tries to build for the correct FPGA as expected.

Setup Details

# uhd_config_info --version
UHD 4.0.0.0-154-gb061af4f
# git log
commit b061af4fcf62b2bb640636cea7170003f6a2777d (HEAD -> UHD-4.0, origin/UHD-4.0)
# lsb_release -d
Description:    Ubuntu 20.04.2 LTS
# vivado -version
Vivado v2019.1 (64-bit)
SW Build 2552052 on Fri May 24 14:47:09 MDT 2019
IP Build 2548770 on Fri May 24 18:01:18 MDT 2019
Copyright 1986-2019 Xilinx, Inc. All Rights Reserved.

Expected Behavior

I expected, that running make testbenches would work for other usrp devices, if that device was selected via UHD_FPGA_DEFAULT_DEVICE in CMakeLists.txt.

Actual Behaviour

Running ARCH=zynq PART_ID=xc7z100/ffg900/-2 make testbenches seems to work. Forgetting the ARCH=zynq part leads to:

make[4]: *** No rule to make target '/tmp/rfnoc-example/fpga/rfnoc_block_gain/build-ip/xc7z100ffg900-2/cmplx_mul/sim/cmplx_mul.vhd', needed by 'xsim'.  Stop.
make[3]: *** [fpga/rfnoc_block_gain/CMakeFiles/rfnoc_block_gain_tb.dir/build.make:57: fpga/rfnoc_block_gain/CMakeFiles/rfnoc_block_gain_tb] Error 1
make[2]: *** [CMakeFiles/Makefile2:273: fpga/rfnoc_block_gain/CMakeFiles/rfnoc_block_gain_tb.dir/all] Error 2
make[1]: *** [CMakeFiles/Makefile2:253: CMakeFiles/testbenches.dir/rule] Error 2
make: *** [Makefile:177: testbenches] Error 2

Steps to reproduce the problem

Essentially as described in https://kb.ettus.com/Getting_Started_with_RFNoC_in_UHD_4.0#Creating_Your_Own_OOT_Module but change desired UHD_FPGA_DEFAULT_DEVICE to n310 and set PART_ID to the fpga that is acually used in the usrp n310:

UHD_REPO=<path-of-uhd-repo>
cd /tmp/
. "$UHD_REPO/fpga/usrp3/top/n3xx/setupenv.sh"
cp -r "$UHD_REPO/host/examples/rfnoc-example/" .
sed 's/set(UHD_FPGA_DEFAULT_DEVICE "x310"/set(UHD_FPGA_DEFAULT_DEVICE "n310"/' -i rfnoc-example/CMakeLists.txt
mkdir rfnoc-example/build
cd rfnoc-example/build/
cmake -DUHD_FPGA_DIR="$UHD_REPO/fpga/" ..
ARCH=zynq PART_ID=xc7z100/ffg900/-2 make testbenches

If in the last line you execute just make testbenches, the changed setting in CMakeLists.txt is ignored.

Additional Information

I'm not able to reproduce it, so I might remember incorrectly, but I think I could previously solve the problem without the ARCH=zynq part before make, but I needed to change blocks like

LIB_IP_COMPLEX_MULTIPLIER_OUTS = $(addprefix $(IP_BUILD_DIR)/complex_multiplier/, \
complex_multiplier.xci.out \
synth/complex_multiplier.vhd \
)

LIB_IP_COMPLEX_MULTIPLIER_OUTS = $(addprefix $(IP_BUILD_DIR)/complex_multiplier/, \
complex_multiplier.xci.out \
synth/complex_multiplier.vhd \
sim/complex_multiplier.vhd \
)

(i.e. adding the sim/..... line) in cmplx_mul/Makefile.inc (the one within my copy of the example project) and fpga/usrp3/lib/ip/complex_multiplier/Makefile.inc. (For completeness, the other fpga/usrp3/lib/ip/*/Makefile.inc files should probably also be changed.)

I also changed the fpga/ip/cmplx_mul/cmplx_mul.xci so it is configured for the correct fpga. I ran

$VIVADO_EXEC -mode gui -source $(resolve_viv_path $VIV_IP_UTILS) -nolog -nojournal -tclargs modify xc7z100ffg900-2 fpga/ip/cmplx_mul/cmplx_mul.xci

(this is essentially, what viv_modify_ip does, but I hardcoded the device in the command) and in vivado sellected "upgrade IP" as it was currently locked because the device was changed.

As ARCH=zynq PART_ID=xc7z100/ffg900/-2 make testbenches seems to work, the problem is far less bad than I initially assumed (before editing this issue). I think if viv_sim_preamble.mak would default to the device matching the last fpga/usrp3/top/n3xx/setupenv.sh command (as suggested in the TODO note), then most of my problems would have been avoided.

EttusResearch / uhd