When set - either via POPF or a thread context operation - the trap flag raises a single step exception after the execution of each instruction.As e.g. a JUMP instruction with TF set will raise an exception at the jump target. Handle this on the FEX side by storing both the flag itself (in bit 0) and a 'block exceptions' flag (in bit 1, inverted). Each generated block when TF is set is then forced to a single instruction with logic to raise the exception at the start. Initially after setting TF exceptions are blocked, then at the start of the block they are unblocked so that after the instruction executes an exception is raised at the start of the next block.
When set - either via POPF or a thread context operation - the trap flag raises a single step exception after the execution of each instruction.As e.g. a JUMP instruction with TF set will raise an exception at the jump target. Handle this on the FEX side by storing both the flag itself (in bit 0) and a 'block exceptions' flag (in bit 1, inverted). Each generated block when TF is set is then forced to a single instruction with logic to raise the exception at the start. Initially after setting TF exceptions are blocked, then at the start of the block they are unblocked so that after the instruction executes an exception is raised at the start of the next block.
This needs some linux-side testing