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FPGA-MAFIA / fpga_mafia

Designing a Multi-Agent Fabric Integration Architecture to run on de10-lite FPGA.
MIT License
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update SDRAM_RTL_TEST folder with new IP version #601

Closed roman012285 closed 3 months ago

roman012285 commented 3 months ago

I started to work on SDRAM, I found test directory in FPGA folder. Its actually a provided test from DE10-LITE CD. I compiled it and it runs on the FPGA, I am not exactly sure what it does but it seems to work. After figuring out what it does it will allow us to modify that unit to our needs. My small concern is that Quartus lite version do not have a free SDRAM IP and I hope it wont make us problems, but I think its ok because all we need is IP system verilog full files and it seems we have them so at the end its not a problem

amichai-bd commented 3 months ago

I think I played around with it a long time ago. Dont remember if i got it running at all..

It should be fairly simple to add some features to it to make sure the memory works.. Using the switch, LED, 7SEG, button we can control a state machine that read & writes to memory. And displays the progress and information for debug on LED, 7SEG.

If you need to me help to come up with a plan on verifying it all works let me know..

Once we are sure we got it to work, we need to modify it to support 128 bit transactions.

And then we will work on simulation and integration of the Cache & core_rrv.

roman012285 commented 3 months ago

Thanks, there are many files that should be in .gitignore, I will figure out later. Thanks. I will play with it allitle bit and than we can think of a plan. Anyway tommorow I am free from teaching and I will work on it