writing MC (memory controller) for communication between host and SDRAM

[roman012285]

** Goal

• Create communication interface between host computer and SDRAM

** requirements

• The controller will receive 128bit data (cache line) and transfer it to SDRAM at 16bit granularity.
• The communication is bi-directional
• The unit will take care of forwarding in case of RAW (read after write) that causes data hazard
• The protocol designed to work with DE10-lite SDRAM
• Support bursts Further specifications will be added in the future

[roman012285]

issue closed at PR #638