Added a new 'apio graph' command which uses yosys to generate, a hardware.svg file with a visual representation of a verilog module. By default it shows the top module and this can be changed with the --top-module flag.
The command requires the graphviz dot command to be in the path. Ideally this can auto installed in future versions of apio.
The command generates the hardware.svg file but doesn't launch automatically a viewer (any web browser would do). Need to find a cross platform way to do that.
The graphs are not perfect, but hopefully will be improved over time. For example per this feature request https://github.com/YosysHQ/yosys/issues/4236 or with additions of post optimization graphs.
Added a new 'apio graph' command which uses yosys to generate, a hardware.svg file with a visual representation of a verilog module. By default it shows the top module and this can be changed with the --top-module flag.
This is the yosys command that generates the graph https://yosyshq.readthedocs.io/projects/yosys/en/manual-rewrite/cmd/show.html
Caveats
The command requires the graphviz dot command to be in the path. Ideally this can auto installed in future versions of apio.
The command generates the hardware.svg file but doesn't launch automatically a viewer (any web browser would do). Need to find a cross platform way to do that.
The graphs are not perfect, but hopefully will be improved over time. For example per this feature request https://github.com/YosysHQ/yosys/issues/4236 or with additions of post optimization graphs.