I'm not sure if this is the 'correct' fix, but linking ecp5/cells_bb.v (since that's where the EHXPLLL definition is) appears to allow compilation to proceed. Feel free to refactor if there's a better or more longstanding change that would better amend this. This is otherwise not desirable behavior for apio verify to fail when using ecp5 primitives.
iverilog fails compilation when working with ECP5 primitives such as EHXPLLL. Issue is documented here: https://github.com/FPGAwars/icestudio/issues/542
I'm not sure if this is the 'correct' fix, but linking
ecp5/cells_bb.v
(since that's where the EHXPLLL definition is) appears to allow compilation to proceed. Feel free to refactor if there's a better or more longstanding change that would better amend this. This is otherwise not desirable behavior forapio verify
to fail when using ecp5 primitives.