cavearr
commented
3 months ago Hi , icestudio is build over Apio (https://github.com/FPGAwars/apio) that is build over yosys (https://github.com/YosysHQ/oss-cad-suite-build). Icestudio support the FPGA chips supported by yosys in main instance.
The "usb" interface depends the chip or method you want to use, for example Alhambra II board (https://github.com/FPGAwars/Alhambra-II-FPGA) use FTDI
Now i'm integrating in Icestudio https://www.ele.uva.es/~jesus/ICECREAM/index.html that delegate the bitstream upload to an LCP1112 uprocesor and a USB-SERIAL interface CDC-ACM chip.
Luke Valenty propose other method for not to use any micro controller https://github.com/tinyfpga/TinyFPGA-Bootloader
And this is other trending option now https://www.youtube.com/watch?v=gGN0g9jgsUc
There are a lot of options, depends of your hardware design and objetives.
I hope this will be helpful for you! If you need something reopen the issue
Hello,
Is there an available spec for the information necessary to "invent" a new board for selection in Icestudio? Are the board definitions in a file in a windows installation?
Also. is there an interface specification for the format of the USB/async communications that uploads the "builds" to the target boards?
Are the specs and designs for the USB interface processors (like PIC16F1459) on development boards open, or are they proprietary to the manufacturers of the boards?
I'm hoping to create a development board for one of the smallest Lattice Ice40 family chips.
Thanks!