Identify missing pins/routes from Altium schematic

[mkosunen]

@FaderOrg/a-team Let's list below the missing pins/routes to be added to the board.

Slide 17: you need to update the schematic symbol to represent your new die, as I outlined in my email of Friday 2/21/20.

[mkosunen]

Below I will list the IO's that are present as Bumps and tick them if they exist in the Kosta's Fader2 Altium Schematic. Then, we need to figure out form the actual netlist if the missing ones are actually floating.

• [x] ANT_0_P

• [x] ANT_0_N

• [x] ANT_1_P

• [x] ANT_1_N

• [x] ANT_2_P

• [x] ANT_2_N

• [x] ANT_3_P

• [x] ANT_3_N

• [x] LO_OVERRIDE_N

• [x] LO_OVERRIDE_P

• [x] CLK_DIG_OVERRIDE_N

• [x] CLK_DIG_OVERRIDE_P

• [x] LINK_CM_TX_1_N

• [x] LINK_CM_TX_1_P

• [x] SCAN_OUT

• [x] SCAN_IN

• [x] SCAN_CLK

• [x] SCAN_EN

• [x] RESET

• [x] ANA_MUX_N

• [x] ANA_MUX_P

• [x] VDD_IO

• [x] VDDA

• [x] DVDD

THESE ARE NOT IN BUMPS SPREADSHEET, BUT IN F2.0 schematic

• [x] VDD_LINK (VDD OF WHAT, SERDES?)
• [x] GATE_LINK (THIS IS NOT F2.1 CHIP IO, brobably a bias needed for Burst mode serdes in v2.0 )

Added: (These serdeses were added)

• [x] LINK_CM_RX_0_N
• [x] LINK_CM_RX_0_P
• [x] LINK_CM_TX_0_N
• [x] LINK_CM_TX_0_P
• [x] REF_SERDES_CM_0_N
• [x] REF_SERDES_CM_0_P
• [x] REF_SERDES_CM_1_N
• [x] REF_SERDES_CM_1_P
• [x] VDD_LINK_CM0 (Regulators for VDD_LINK converted to this)
• [x] VDD_LINK_CM1 (Regulators for GATE_LINK converted to this)

[mkosunen]

Closed by 9f6625067a1dbfb048b688c44