Upgrade SPI HAL and Support For Sensors

[kb1lqd]

Upgrade the support for SPI to share the SPI bus between the SRAM and other devices (Sensors). Due to the high use and priority of the SRAM unit some bugs may need to be addressed to avoid race conditions and other potential issues.

Current SPI Implementation

https://github.com/FaradayRF/Faraday-Firmware/blob/master/Faraday_HAL/SPI.c

Currently the only use of SPI is the

• SRAM - https://github.com/FaradayRF/Faraday-Firmware/blob/master/SRAM/SRAM.c

• Simple single device support

• Single character TX and RX

• RX Is not abstracted and is implemented WITHIN the external function uses

Support Needed

• Multi-device support
  • Support multiple 'chip select' pins
• Do not allow race conditions/priority issues between SRAM (SPI) and other devices
  • Might be easiest to just make sure that no function outside of the main housekeeping loop accesses SPI and therefor conflicts itself due to linear accessing?
• Abstract TX/RX completely
  • Should be simple for single character support, just abstract it out to a function to send and receive.

Support Wanted

• Support multiple bytes in single TX/RX call within the abstraction (avoid loops in the upstream programs)
  • Will need to make sure that all data buffered is transferred completely.
  • May need to switch from SPI polling to interrupt driven?
• Improve speed (remove generic wait statements)
  • Will need to borrow oscilloscope from @kb1lqc for this.
  • Each device has a specific minimum delay time so may be best to abstract out?

Implementations

Abstract TX/RX

Current RX is completely NOT abstracted:

unsigned char Faraday_SRAM_Read_Byte(unsigned int address){
    unsigned char address_h, address_l;

    //Select the SRAM chip select
    Faraday_SRAM_CS_Enable();
    __delay_cycles(50); //Per datasheet at 3.0V CS delay is 25ns = @16MHz is 2.5 clock cycles

    //Shift the address INTEGER into high and low CHAR bytes
    address_h = (address>>8) & 0xFF;
    address_l = address & 0xFF;

    //Send the READ command
    spi_tx(SRAM_READ);

    //Send Address to be written to
    spi_tx(address_h);
    spi_tx(address_l);

    //Send dummy byte to shift SPI registers out of SRAM into RX CC430
    spi_tx(0x00); //dummy

    __delay_cycles(50); //Per datasheet at 3.0V CS delay is 25ns = @16MHz is 2.5 clock cycles
    Faraday_SRAM_CS_Disable();

    unsigned char rx_byte;
    rx_byte = UCB0RXBUF;
    return rx_byte;
}

It seems to abstract RX here I need to:

• Create abstraction function for RX
• Ensure dummy writes are performed for N bytes of RX data

Update Logs

• 9/11/2017
  • I implemented many abstraction (well mostly) of the SPI in https://github.com/kb1lqd/Faraday-Firmware/commit/6b6d4aea87cb4f3723db27aac23b7411ed3a9d1a
  • I seem to not be receiving UART in real term although the debug MSP430 testing shows bytes being sent in Layer 2... Not sure what it happening or why.

[kb1lqd]

Closing due to scope reduction, not adding I2C sensors and focusing on core telemetry and analog to then move onto other Faraday uses such as TUN network adapter and RPI integration.

SPI was improved in the push and provisional function(s) provided for multiple SPI devices on bus.