PCB:NG DFM Errors

[kb1lqc]

Working through their DFM errors to make an extremely easy to manufacture board

• Wow, this seems really nice. I like what PCB:NG has done!
• Using the new RAND beta software

• [x] Reduce errors
• [x] Move reference designators back after updating modules

[kb1lqc]

• Moved ground via on pin 1 of Antennoa GPS U7 away from board edge ✔️

Minimum trace width on Top Layer

• Not sure what these mean, I can't really see where the traces are less than 4 mil... Is the DFM check confusing the pad overlayed with the trace to be another trace... basically the part of the C9 pad that's handing off to the right of the arrow?
  • Another instance of the same problem near the FT230X USB UART... I can't see what's wrong...

Minimum Trace Space on Outer Layers

• Looks like a ground via is a bit too close but not connected to the ground pour. Kicad won't catch this 😄 I added some copper pour zones to pour into the vias. Doesn't really make a difference for RF microstrip copper pullback since the via is already there.

Soldermask Slivers

• Whoa there are hundreds of these... looks like every 0402 part at a minimu.
• I changed the Kicad global setting for a minimum soldermask of 4 mils. Let's see what that buys us on new gerbers.
• [x] Check soldermask swell again ⚠️

Minimum Mask to Copper Clearance

• This looks to be like a minimum soldermask clearance setting. I'll change my global values to 4 mils
• [x] Check soldermask clearance again ⚠️

[kb1lqc]

Updated gerbers to 4 mil clearance and checked with PCB:NG DFM tools. Also, PCB:NG has confirmed that with a third party DFM tool they see no errors either.

commit: cb88a0e8ccfb084bbe348435397033d314ff4594