Open Zawaher-Bin-Asim opened 6 days ago
The unit should contain the pinout diagram , block digram , rtl code in system verilog with parameterize signals and add the proper documentation of the unit and also explain the jargons realted to unit in the documentation
@Fazail333 The issue needs description. Also, I see only two assignees here: Fazail and Zawahir. What issues are assigned to the rest of the team?
The unit should contain the pinout diagram , block digram , rtl code in system verilog with parameterize signals and add the proper documentation of the unit and also explain the jargons realted to unit in the documentation