Add on Power Limit

[Faintsnow]

Would you add on Power Limit decode?

[FlyGoat]

I'm not very sure what did you mean.

But I didn't managed to get a dump of PPTable. Also there is no SMU calls for reading Power Limit parameters so I guess I can do nothing with it.

Thanks.

[Faintsnow]

It seems SMU 0x16 can dump PPT.

define SMC_MSG_SetBiosDramAddrHigh 0x12

define SMC_MSG_SetBiosDramAddrLow 0x13

define SMC_MSG_SetToolsDramAddrHigh 0x14

define SMC_MSG_SetToolsDramAddrLow 0x15

define SMC_MSG_TransferTableSmu2Dram 0x16 //! RS

typedef struct { uint32_t Version;

//PCD infrastructure limits uint32_t SUSTAINED_POWER_LIMIT; //Power [mWatts] (STAPM) uint32_t FAST_PPT_LIMIT; //Power [mWatts] (fPPT) uint32_t SLOW_PPT_LIMIT; //Power [mWatts] (sPPT) uint32_t SLOW_PPT_TIME_CONSTANT; //Time constant (seconds) uint8_t SYSTEM_TEMPERATURE_TRACKING; //Tskin feedback from EC; 1 = enabled; 0 = disabled uint8_t STAPM_BOOST_OVERRIDE; //1 = use value in STAPM_BOOST; 0 = use SMU FW default uint8_t STAPM_BOOST; //1 = enabled; 0 = disabled uint8_t AA_MODE_EN; //A+A power/thermal sharing algorithm; 1 = enable; 0 = disable uint32_t STAPM_TIME_CONSTANT; //Time constant (seconds) uint32_t THERMCTL_LIMIT; //Tctrl (THM) uint32_t VRM_CURRENT_LIMIT; //Current [mA] (VDDCR_VDD TDC) uint32_t VRM_MAXIMUM_CURRENT_LIMIT; //Current [mA] (VDDCR_VDD EDC) uint32_t VRM_SOC_CURRENT_LIMIT; //Current [mA] (VDDCR_SOC TDC) uint32_t VRM_SOC_MAXIMUM_CURRENT_LIMIT; //Current [mA] (VDDCR_SOC EDC) uint32_t PSI0_CURRENT_LIMIT; //Current [mA] (VDDCR_VDD PSI0) uint32_t PSI0_SOC_CURRENT_LIMIT; //Current [mA] (VDDCR_SOC PSI0) uint32_t PROCHOT_L_DEASSERTION_RAMP_TIME; //Time [ms] (PROCHOT) uint8_t SYSTEM_CONFIG; //0 = use fused default; >0 = user specified value uint8_t itemp; uint8_t Voltage_SlewRate; //Only used in conjunction with WaitVidCompDis = 1 uint8_t spare;

//PCD/CBS fan table uint8_t FanTable_Override; //[1 means use the full set of data specified below; 0 means use default fan table] uint8_t FanTable_Hysteresis; uint8_t FanTable_TempLow; uint8_t FanTable_TempMed; uint8_t FanTable_TempHigh; uint8_t FanTable_TempCritical; uint8_t FanTable_PwmLow; uint8_t FanTable_PwmMed; uint8_t FanTable_PwmHigh; uint8_t FanTable_PwmFreq; //[0 = 25kHz; 1 = 100Hz] uint8_t FanTable_Polarity; //[0 = negative; 1 = positive] uint8_t FanTable_spare;

//CBS debug options uint8_t CoreDldoPsmMargin; //[PSM count 1 ~ 1.8mV] uint8_t GfxDldoPsmMargin; //[PSM count 1 ~ 1.8mV] uint8_t ForceFanPwmEn; //[1 means use the ForceFanPwm value below] uint8_t ForceFanPwm; //[% 0-100] uint8_t CoreStretchThreshEn; //[1 means use the CoreStretchThresh value below] uint8_t CoreStretchThresh; //[1 = 2.5%] uint8_t L3StretchThreshEn; //[1 means use the L3StretchThresh value below] uint8_t L3StretchThresh; //[1 = 2.5%] uint8_t GfxStretchThreshEn; //[1 means use the GfxStretchThresh value below] uint8_t GfxStretchThresh; //[1 = 2.5%] uint8_t GfxStretchAmountEn; uint8_t GfxStretchAmount; uint8_t CoreDldoBypass; //[1 means bypass] uint8_t GfxDldoBypass; //[1 means bypass] uint8_t XiSeparationEn; //[1 means use the XiSeparation value below] uint8_t XiSeparationHigh; //[0 = async mode; 3 = 2 cycle; 4 = 2.5 cycle; 5 = 3 cycle; 6 = 3.5 cycle; 7 = 4 cycle] uint8_t XiSeparationLow; //[0 = async mode; 3 = 2 cycle; 4 = 2.5 cycle; 5 = 3 cycle; 6 = 3.5 cycle; 7 = 4 cycle] uint8_t AvfsCoeffTable_Override; //[1 = override; 0 = use defaults] uint8_t MP2CLK_PwrDn; uint8_t SbTsiAlertComparatorModeEn; int32_t VddcrVddVoltageMargin; //[mV] int32_t VddcrSocVoltageMargin; //[mV] uint16_t FcwSlewFrac_L3FidTotalSteps; uint8_t FcwSlewFrac_L3FidTotalStepsEn; uint8_t WaitVidCompDis; //[0 = use VOTF feedback from VR; 1 = use internal timer] uint8_t UseCcxFreqCurveFuses; uint8_t UseGfxFreqCurveFuses; uint8_t UseCacSiddFuses; uint8_t ApplyRichtekVrmPsi0Workaround;

//CBS debug options [AVFS coeffients - signed 2's complement with 24 fractional bits] int32_t CorePsfFreq2; int32_t CorePsfFreq; int32_t CorePsfGfxActive; int32_t CorePsfTemp; int32_t CorePsfSidd; int32_t CorePsfCac; int32_t CorePsfNumActiveCores; int32_t CorePsfSigma; int32_t CorePsfAcBtc; int32_t L3PsfFreq2; int32_t L3PsfFreq; int32_t L3PsfGfxActive; int32_t L3PsfTemp; int32_t L3PsfSidd; int32_t L3PsfCac; int32_t L3PsfNumActiveCores; int32_t L3PsfSigma; int32_t L3PsfAcBtc; int32_t GfxPsfFreq2; int32_t GfxPsfFreq; int32_t GfxPsfGfxActive; int32_t GfxPsfTemp; int32_t GfxPsfSidd; int32_t GfxPsfCac; int32_t GfxPsfNumActiveCores; int32_t GfxPsfSigma; int32_t GfxPsfAcBtc;

//PCD/CBS Telemetry setup uint32_t Telemetry_VddcrVddSlope; int32_t Telemetry_VddcrVddOffset; uint32_t Telemetry_VddcrSocSlope; int32_t Telemetry_VddcrSocOffset;

// LIVmin Entry voltage uint8_t LivMinEntryVID; uint8_t spare3[3]; //placeholder for RV2 LIVmin Entry voltage uint32_t Telemetry_VddcrVddSlope2; uint32_t Telemetry_VddcrVddSlope3; uint32_t Telemetry_VddcrVddSlope4; uint32_t Telemetry_VddcrVddSlope5; uint32_t MinS0i3SleepTimeInMs; //PCD/CBS STT (System Temperature Tracking) Configuration uint32_t STT_MinLimit; // Power [mWatts] uint8_t CalculateIOPhyDataDis; uint8_t FmaxTempThreshold; uint16_t FmaxTempFrequency;

uint8_t UsbPortsToClearWceWde[2]; //Set bits to indicate that WceWde needs to be cleared uint8_t minSocVidOffset; // ULV SOC vid adjustment uint8_t AclkDpm0Freq400MHz;

uint16_t ForceVddcrVddVoltage; //[mV; 0 means no force] uint16_t ForceVddcrSocVoltage; //[mV; 0 means no force]

uint32_t WLAN; //[31:24]Offset,[23:16]PcieBus,[15:8]PcieDevice,[7:0]PcieFunction

uint32_t spare5[10]; } PPTable_t;

[FlyGoat]

@Faintsnow Thanks for your info. Is that for raven? I had borrowed out my Raven machine so I can't do anything for now, but maybe @MinecraftAddict131 @irusanov can do something with it.

[GoelBiju]

@FlyGoat was TransferTableSMU2Dram ever tried out? I thought it wasn't working initially on Raven? I have my Raven laptop but I thought that initially when it was tested it yielded nothing?

[FlyGoat]

@GoelBiju Not sure. My pp_kmod attempt failed but probably I made some mistake here.

@Faintsnow any details?

Thanks.

[GoelBiju]

@GoelBiju Not sure. My pp_kmod attempt failed but probably I made some mistake here.

Yeah I didn't look into it any further after that was mentioned and also was initially confused where to start on it. Although it might be worth trying out again.

[Faintsnow]

@FlyGoat I've tried pp_kmod on my Ranoir 4800H APU and it failed too. AMD CE suggests me use TransferTableSMU2Dram but haven't provided concrete approaches...

[irusanov]

@Faintsnow It has been a long time now, but this seems to work for both desktop and mobile Renoir

Rsmu.SMU_ADDR_MSG = 0x03B10A20;
Rsmu.SMU_ADDR_RSP = 0x03B10A80;
Rsmu.SMU_ADDR_ARG = 0x03B10A88;

Rsmu.SMU_MSG_GetTableVersion = 0x6;
Rsmu.SMU_MSG_TransferTableToDram = 0x65;
Rsmu.SMU_MSG_GetDramBaseAddress = 0x66;

For all other older APUs (Raven, Dali, Fireflight, Picasso) I use these

Rsmu.SMU_ADDR_MSG = 0x03B10A20;
Rsmu.SMU_ADDR_RSP = 0x03B10A80;
Rsmu.SMU_ADDR_ARG = 0x03B10A88;

Rsmu.SMU_MSG_GetDramBaseAddress = 0xB;
Rsmu.SMU_MSG_GetTableVersion = 0xC;
Rsmu.SMU_MSG_TransferTableToDram = 0x3D;

Keep in mind ZenTimings needs just these commands to operate correctly. It also might not work on every SMU version, but seems to be ok based on user reports.

PS: These are for the RSMU (PSMU in this repo) or whatever it is called. Listed commands in the README seem to be for MP1, if I'm not wrong. I have tried to use MP1 for power table on older gen, but without success. Couldn't really figure out what I'm doing wrong.

I believe that if we want to have a full-blown tool to control overclock, limits, voltages and to read power table, both mailboxes would need to be used. For example, I can't seem find overclocking commands in RSMU for Summit Ridge, but they are available in MP1. RSMU is needed for reading power table, though.

[Falcosc]

I can confirm, I just did it yesterday on my Renoir with 0x66 you will get the DRAM pointer inside the first argument address And 0x65 refreshes the memory

But it does not work with smu-tool -p attribute Maybe there is a wait missing or something did get overwritten. I didn't manage to get the build process working on windows, so I did stop using smu-tool for PSMU tests

The windows tool RWEverything does provide easy access to members and PCI devices. I could do thing like read out the according PSMU adresses with 10ms refresh delay to check for timing or overwrite issues in smu-tool but didn't find an obvious reason for the smu-tool bug.

In the end I just use Ryzen Mobile Tuning for readout and it didn't bother me anymore.