Closed univta0001 closed 4 months ago
I can't test it at the moment because my real A2 is in bad shape (especially the Mockingboard!). But I will test as soon as possible.
And for the NTSC, it's good to know. But this time I won't be able to test at all on a real machine because I only have a PAL version!
For NTSC, the only code difference is in the main.a around line 323
LDA VERTBLANK ; wait for start of VBL (IIc specific) and INT occurs
BPL -
LDY #70 ; then WAIT 120 (PAL: 70+50) lines = VBL delay
; then WAIT 70 (NTSC: 70) lines = VBL delay
JSR WAIT65
LDA #00
STA bINTIIc ; init to zero (IIc only)
JMP .next
; ==========================================================
; ==========================================================
; CODE FOR IIe
; ==========================================================
.IIe ; wait for DISPLAY
- LDA VERTBLANK
BMI -
- LDA VERTBLANK
BPL - ; wait until next DISPLAY
; ==========================================================
.next ; here "beginning" of DISPLAY (no need to be more precise)
LDY #75
JSR WAIT65 ; wait Y lines (first part of HGR)
SEI
; set 6522-1/T2 INT delay - sync code for beginning DGR window
LDX #$84
LDY #$42 ; one full PAL frame (20280-2 = 4f36)
; one full NTSC frame (17030-2 = 4284)
STX $C408 ; T2C_1-Lower
STY $C409 ; T2C_1-High (+reset interrupt flag)
HEIGHT = 90 ; lines/height of DGR window
DELAY1 = HEIGHT*65-2 ; nb of cyles for DGR window (minus 2 for INT)
DELAY2 = (192+70-HEIGHT)*65-2 ; nb of cycles of the rest of the frame (display+vbl-window) (minus 2)
The compiled binary is tested on AppleWin and also on my emulator at https://github.com/univta0001/emu6502. It is able to run successfully on both. Strangely my emulator do not work perfectly for PAL. It starts to work if the HEIGHT is set to 91. However using HEIGHT = 91, it does not work for the NTSC binary. AppleWin works for both HEIGHT = 90 / 91 and PAL / NTSC.
Does this demo leverages on the defer IRQ last tick of 6502 for it to work ?
Attached is the compiles binary for DD2 for NTSC
I didn't know your emulator at all (shame on me). Very interesting! I added it immediately to my workspace so I could directly test my woz/dsk with it from VSC. I see that when we use HEIGHT=90 in PAL, with EMU6502 we seem to lose sync. As if the INT was not waiting for an entire frame but with a few fewer cycles (this is why the transition between modes goes back little by little.) Look around line 712 the interesting part:
LDA #(<DELAY1-14) ; 14 => (LDA+SEC+ADC+STA=12 to substract) - 2 (6522/timer)
SEC ; compute new delay value (minus cycles already passed)
ADC $C408 ; SEC/negative value here (counter = $FFXX)
STA $C408
LDA #>DELAY1
ADC $C409
STA $C409 ; write T2C_1-High / reset IFR
Maybe an issue with the value returned by the 6522 counter in some cases? (DELAY1 = HEIGHT*65-2)
Hi, thanks for providing the hint at looking at value return from $C408 and $C409. Indeed, it is a implementation issue when writing to $C408 (T2CL), it also writes to T2C. I have updated the implementation to only update to the T2C latch. After this fix, the demo is able to run on both PAL and NTSC with HEIGHT = 90 and 91 (same as AppleWin).
Thanks. you can close this ticket.
Hi, first of all, thanks for the great demo.
This demo seems to work for HEIGHT for both 90 and 91 and verified in AppleWin. Does HEIGHT = 91 works for real machines ?
I have also experimented the code with NTSC parameters and it works like charm