FredTingaud / quick-bench-front-end

Front end side of quick-bench
BSD 2-Clause "Simplified" License
141 stars 11 forks source link

Disassembly should use Intel syntax by default #84

Open lhmouse opened 7 months ago

lhmouse commented 7 months ago

Indeed there are some issues with the Intel syntax e.g. one may want to use SP as the name of a function or static variable which would confuse the assembler, but for code that is to be read by humans, there is really no reason to prefer the awkward AT&T syntax.

Other than official Intel and AMD documentation,

  1. The great work by Ed Jorgensen uses Intel syntax with YASM: http://www.egr.unlv.edu/~ed/assembly64.pdf
    We also note this course is for Ubuntu but they don't use the GNU assembler.
  2. The μop database uses Intel syntax: https://uops.info/table_overview.html
  3. The Compiler Explorer uses Intel syntax by default: https://gcc.godbolt.org/
  4. The FreeBSD handbook uses Intel syntax with NASM: https://docs.freebsd.org/en/books/developers-handbook/x86/ This is another non-Windows platform. All assemblers that targe x86 and x86-64, except the GNU assembler, use Intel syntax: nasm, yasm, etc.
  5. The x64dbg debugger uses Intel syntax: https://x64dbg.com/
lhmouse commented 7 months ago

Also there should be an option to set the input syntax i.e. to pass -masm=intel to GCC, so inline assembly can be in Intel syntax. Hence

    __asm__ volatile (
      "lock cmpxchg %0, %2"
      : "+m"(value), "+a"(cmp) : "c"(swap)
      //  0            1          2
    );

will be accepted as lock cmpxchg qword ptr [rsp + 16], rcx instead of some GNU nonsense such as

Error: operand size mismatch for `cmpxchg'