This allows building GRChombo on AArch64 systems (e.g. Apple Silicon Macs).
The Neon instructions (relevant to current generation Apple Silicon) have been tested by running the tests on the XCI part of the Isambard cluster.
The SVE instructions have been tested by running the tests on the A64FX part of the Isambard cluster. Note that the implementation of Scalable Vector Extension (SVE) instructions is a bit strange due to the limitations of our current interface. In particular, the Vector Length Specific (VLS) extension to SVE is required. On supported compilers, it may need to be manually enabled with a flag e.g. -msve-vector-bits=<number of bits> with GCC.
This allows building GRChombo on AArch64 systems (e.g. Apple Silicon Macs).
The Neon instructions (relevant to current generation Apple Silicon) have been tested by running the tests on the XCI part of the Isambard cluster.
The SVE instructions have been tested by running the tests on the A64FX part of the Isambard cluster. Note that the implementation of Scalable Vector Extension (SVE) instructions is a bit strange due to the limitations of our current interface. In particular, the Vector Length Specific (VLS) extension to SVE is required. On supported compilers, it may need to be manually enabled with a flag e.g.
-msve-vector-bits=<number of bits>with GCC.