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Add flipped-bit tolerance to digital comms #21

Open dcstraney opened 4 years ago

dcstraney commented 4 years ago

Should plan for I2C bus having an occasional bit error from EMI of some kind (nearby ESD, valve spikes, etc.). This means any single sensor reading could have an error:

Proposed handling in software:

ralphBellofattoSTX commented 4 years ago

@dcstraney how are we planning to deal with the sensor reading with the cpld and the rpi.

if the clpd does it, it can pretty much poll the i2c bus at its highest frequency and do what bascially is a low pass filter with it.

dcstraney commented 4 years ago

Plan is for 2 separate buses actually: had discussed this before with Alan and Stephanie. Having a multi-master bus is possible but needs a bunch of extra logic and hardware to be reliable (preventing a Pi failure or other single device from making the whole bus unusable), and having dual ADCs and pressure sensors (if digital ones used) adds some nice redundancy.

Low-pass filtering the readings makes sense, but depending on filter size, a flipped MSB might still cause a noticeable output shift. Would also be good to be able to explicitly detect errors (either with comms or sensor) to be able to know that something is wrong and possibly switch to redundant bus/sensors.

ralphBellofattoSTX commented 4 years ago

@dcstraney separate i2c busses, so the devices we are using are dual ported?

dcstraney commented 4 years ago

Nope just 2 of each, for redundancy. 2 ADCs, 2 low-pressure sensors, 2 high-pressure sensors...

ralphBellofattoSTX commented 4 years ago

what about the o2 sensor?

dcstraney commented 4 years ago

That's read by the ADCs.