GuzTech / fpga-zynq

Support for Rocket Chip on Zynq FPGAs
http://bar.eecs.berkeley.edu/projects/2014-rocket_chip.html
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fesvr-zynq hangs the system #2

Open GuzTech opened 7 years ago

GuzTech commented 7 years ago

Whenever fesvr-zynq is executed (even without the pk hello arguments), the entire system hangs (verfied with xmd). The following steps were taken to find the issue:

I want to test if the AXI port between the PS and PL works correctly by attaching an AXI block RAM IP with the same address as what fesvr-zynq tries to access (0x43C0_0000).

GuzTech commented 7 years ago

I changed the address of M_AXI to 0x4000_0000 and added an AXI BRAM IP with address 0x43C0_0000, but it still hangs.

GuzTech commented 7 years ago

Trying to access memory locations using U-Boot also hangs the system, so the main problem is not with the rocket core.

GuzTech commented 7 years ago

I stripped the generated Vivado project down to just the PS, one AXI interconnect, a multiplier IP, and the reset system, so there's no more rocket core in the design. I used the FCLK_CLK0 from the PS as the clock source for everything connected to the PS. When running a hello world application via JTAG, the system locks up when trying to access my multiplier IP.

I built the same design by hand using the Arty-Z20 board files from digilent (the PYNQ-Z1 is alsmost exactly the same board). With the same design I can run the same hello world program just fine.

Diffing the block diagram files of both projects (.bd files), there were some differences but nothing major. Mostly the names different and the DDR configuration was slightly different, but that should have no impact on how the GP0 port works.

I tried regenerating the Vivado project with the rocket core, and attached my multiplier IP to the AXI interconnect to which the rocket core is connected. Using both the hello world application and U-Boot memory commands, I can access my multiplier IP just fine. It turns out that I can write to the rocket core, but reading locks up the system. This would normally mean that there is something wrong with the rocket core IP, but I got the same lockups before when I used the stripped generated project with the same hardware.

GuzTech commented 7 years ago

I have verified that the RISCV slave IP target clock is 50MHz and that the target reset signal remains asserted until fesvr is run.

lzto commented 8 months ago

Hi GuzTech, Did you finally get it up and running? I recently picked up an Arty Z7 board and started to work on this. So far, I have created the bitstream file, and managed to boot linux on it, however, when I read or write address at 0x43c00000 the board just completely lockup -- even in uboot. Do you happen to have any experience on this situation what might have gone wrong? Thanks,