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HPCE / hpce-2016-cw5

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Parallel logic_sim #21

Closed a-camuto closed 7 years ago

a-camuto commented 7 years ago

I've been trying to parallelise the for loop in the "next" function because it doesn't have any apparent loop carried dependencies. The output is correct for smaller scales, but as soon as the scale increases my output is completely off. Has anyone been having similar issues with logic_sim ?

zhiyb commented 7 years ago

What I found out: In STL, vector<bool> is different than other types of vectors. It was implemented by using bitfields, to save memory space. Therefore it is not thread safe when modifying different elements.

a-camuto commented 7 years ago

Oh awesome thank you !