search

Hackin7 / EE2026-Finance-Bros

Engineers go into finance just like what CDE O Week encourage us to. E-MODs for AY2324 S1 Lab 1 Group 04
0 stars 0 forks source link

Master Slave Communication & Data Modules in Verilog #4

Open Hackin7 opened 3 months ago

Hackin7 commented 3 months ago

Implement the Python Prototype in https://github.com/users/Hackin7/projects/3/views/1?pane=issue&itemId=56194345

Hackin7 commented 3 months ago

Right now Communications work over UART to a PC. To analyse if the values are updated properly, we need a simple UI https://github.com/Hackin7/EE2026-Finance-Bros/commit/f543f5d0ac15380afff06176d3f6c05027d85a26