ALU - Githubissues

HansenDJ / 8-bit-console-clone-verilog

An 8-bit video game console clone written in Verilog for a BASYS 3 FPGA

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ALU #1

Open HansenDJ opened 8 months ago

HansenDJ commented 8 months ago

8-bit Computation ALU:

[x] 8-bit Add/Sub
[x] 8-bit Multiply
[x] 8-bit Divide
[x] 8-bit XOR
[x] 8-bit OR
[x] 8-bit AND
[x] 8-bit Compliment
[x] 8-bit Inc
[x] 8-bit Dec
[x] 8-bit Logical Left Shift
[x] 8-bit Logical Right Shift
[x] 8-bit Arithmetic Left Shift
[x] 8-bit Arithmetic Right Shift

16-bit Address ALU:

[x] 16-bit Add/Sub
[ ] 16-bit Load Effective Address
[x] 16-bit Inc
[x] 16-bit Dec

hyperdriveguy commented 8 months ago

The ALU should also include:

[ ] 8-bit and 16-bit Comparator, register inputs or register and immediate with flag changes for outputs
- [ ] Check equal values, store in z
- [ ] Unsigned greater than, store in c
- [ ] Unsigned less than, store in c
- [ ] Signed greater than, store in s
- [ ] Signed less than, store in s

hyperdriveguy commented 8 months ago

15 8-bit operations, 6 16-bit operations