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HardwareIR / netlistDB

netlistDB - Intermediate format for digital hardware representation with graph database API
MIT License
29 stars 2 forks source link

Maybe rename this repo too? #7

Closed XVilka closed 5 years ago

XVilka commented 5 years ago

To the NetlistDB respectively.

Nic30 commented 5 years ago

That the thing I would like to discuss with you. Do you like the name and ROADMAP ? Also what do you think about the roadmap also it would be great if we can come up some plane about integration to other tools.

This week I will finish verilog serializer and add rest of the hardware types, this will be the step which allows users to use this library.

It would be great if we can then discuss how to propagate this library. Because even in 2019 peoples still think that the verilog and tcl api are the best combination for hw developement https://github.com/abk-openroad/OpenSTA.

I do have verilog/vhdl parser https://github.com/Nic30/hdlConvertor. I planing to remove dependency on python and add support for this library. I think that this could be the main think for the users. But as I am alone it would take a time...

XVilka commented 5 years ago

ROADMAP and name look good, yeah. I will be able to help with some parts, if it can be split up to the issues.

XVilka commented 5 years ago

I think it is better to setup a Gitter channel for this project.

Nic30 commented 5 years ago

Excellent! Tomorrow I am going on a business trip then I do have to finish something for Open vSwitch. Then I will be able to finally finish the serialization to Verilog. From there it will be possible to parallelize development. As a start I would like to get rid of TBB because it is not flexible (replace by boost).

Nic30 commented 5 years ago

renamed, gitter established