Example on how to setup an OTP configuration

[andrecurvello]

Hi!

As you showed how to setup the channel_config and how to generate a pdata binary for mcp2515, could you please provide an example on how to program the OTP memory for the CP2130?

I'm aware that the setup mode of each configurable pin needs to be set in the OTP. Once the mode has been set, its operation can be dinamically modified by the user. (Ex: If it is a GPIO, it can be input or output)

From the AN792 - https://www.silabs.com/documents/public/application-notes/AN792.pdf: "Once a GPIO pin function has been set in the OTP ROM, the pin function cannot be changed, but the output mode (push-pull or open-drain) may be overridden at runtime with the Set_GPIO_Chip_Select (Command ID 0x25) and Set_GPIO_Mode_And_Level (Command ID 0x23) commands. Refer to the CP2130 data sheet for full pin function descriptions. See also Set_Pin_Config (Command ID 0x6D)."

For example, if I want that the GPIO.4 to be configured as a GPIO Input, how could it be with your driver?

Best, Andre Curvello

[jh-hsd]

Here is how I write the OTP ROM for 2 ARINC429 chips: echo -n x,x,x,0,0,0,0,x,x,x,x > /sys/.../otp_rom where GPIO 3, 4, 5 and 6 are configured for inputs, all other GPIOs remain unchanged (x). If you just want to use input pins for IRQ and output pins for nCS you can simply use the runtime configuration mode and configure the device on boot/plug from udev as IRQ pins are configured as inputs then and nCS pins are configured as outputs. In my opinion OTP ROM is not needed at all for most situations, only in case another driver shall use the pre-configured pins it may help and if you do not want to have udev involved (e.g. if you use device tree setup on ARMs). From your example, having GPIO.4 configured as input you will do echo -n x,x,x,0,x,x,x,x,x,x,x > /sys/.../otp_rom which leaves the other pins unchanged. Does this help?

[andrecurvello]

Hi @jh-hsd, thanks for your reply.

Yes, that helps.

I was thinking that the "mode" of each pin must be previously set on OTP ROM in order to control it dynamically.

For example, GPIO.4 has a default configuration setup for "Event Counter", in the mode of Rising Edge. And in this function (event counter), it can be set to operate in the modes "rising edge, falling edge, positive pulse, or negative pulse".

For it to operate in GPIO "only", in which I could set it to input, open-drain output or push-pull output , I thought that it must be set in OTP first, based on that part I quoted from the AN792.

Continuing the AN792, in the part "Set_GPIO_Mode_And_Level", it says "This command can override the GPIO pin modes programmed in the OTP ROM configuration. However the GPIO pin function cannot be overridden."

In other words - One time set for GPIO, forever GPIO.

My only fear is that the "Set_Pin_Config (Command ID 0x6D)" from "OTP ROM Configuration Commands (Control Transfers)" is, literally, "one time only", and... How could I use a pin with a different default function as GPIO pin function, setting it for input (for IRQ, for example) or output.

The CP2130 can change its GPIOs function/modes without programming the OTP?

In other words, it could work for the GPIO.6, that is already a GPIO (input), or the GPIO.7, that is a GPIO (output), but it would work for the GPIO.4 or the others pins with different default functions too?

[jh-hsd]

I am not sure if I understand the issue, for IRQ pins you can see in line 970+ the code that makes an interrupt pin an input and for CS, IIRC, when a SPI message is sent you give the CS pin along with the message which makes the CP2130 handle it according to the CS requirements and configuration. You can also configure the GPIOs from sysfs according to ./Documentation/gpio/sysfs.txt in kernel sources.

[andrecurvello]

In the example of the MCP2515, you used the GPIO.6 pin, which is already an in input, for IRQ of the MCP2515 device. But have you tested the IRQ feature connecting other GPIO from the CP2130?

[jh-hsd]

I am currently using pin 0 and 1 for CS (1st parameter to channel_config) and pin 4 and 6 (3rd parameter) for interrupts. I am not sure if I did check for other configurations during development. Does it not work for you? If not, could you please provide information about the SPI slave chip and the configuration that you are using along with the observed issue?