AMD E2-3800 CPU. AVX - AVX2 = confusion

[iamhumanipromise]

Expected designations:

• x86_64v1 —> x86_64v0
• x86_64v2 —> x86_64v1
• [New] x86_64v2: includes AVX and a few other common extensions but no AVX2.
• x86_64v3: remains the same
• x86_64v4 (and beyond): remains unchanged.

Attaching cat /proc/cpuinfo from the example CPU (AMD E2-3800):

Is there a reason AVX must stand solely with AVX2 rather than being solo for an architecture level?

[HenrikBengtsson]

FWIW, I've OCR:ed the first photo using https://robertknight.github.io/tesseract-wasm/. It fails with the second one;

rpu > yes
fpu_exception   : yes
cpuid level     : 13
up              : yes
flags           : fpu ume de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmou pat pse36 clflush mmx fxsr sse sse2 ht syscall nx mmxext fxsr_opt pdpe1gb rdtscp lm constant_tsc rep_good nopl nonstop_tsc cpuid extd_apicid aperfmperf pni pclmulqdq monitor ssse3 cx16 sse4_1 sse4_2 movbe popent aes xsave aux fi6c lahf_Im cmp_legacy sum extapic cr8_legacy abm sse4a misalignsse 3dnowprefetch osuw ibs skinit wdt topoext perfctr_nb bpext perfctr_llc hu_pstate proc_feedback ssbd ummcall bmii xsaveopt arat npt lbrusum_lock nrip_save tsc_scale flushbyasid decodeassists pausefilter pfthreshold overflow_recov
bugs            : fxsave_leak sysret_ss_attrs null_seg spectre_v1 spectre_u2 spec_store_bypass retbleed
bogonmips       : 2595.20
TLB size        : 1024 4K pages
clflush size    : 64
cache_alignment : 64
address sizes   : 40 bits physical, 48 bits virtual
power management: ts ttp tm 100mhzsteps hupstate proc_feedback

PS. Please try to avoid photos/screenshots if possible, bc they're accessible (e.g. screen reader users), not searchable, not cut'n'pastable, ...