guimagalhaes
commented
6 years ago The number of actual memory access is hard to predict. The emulator is reading CPU counters, which should tell the actual values. The CPU attempts to hide memory latency by applying for instance memory level parallelism and data prefetch. In order to see a more predictable number of NVM access, you would have to deign your appliacation to access non contiguos (random) memory accesses. The emulator also attempts to discount the number of overhead cycles (cycles used to calculate delay) before actually injecting delay cycles. So you can have a better accuracy is testing the emulator with applications which a bound to memory access (memory latency is the application performance bottleneck).
Hello, during the experiments with pure PM mode, I found that the number of NVM accesses are very different in each trial as followings. I only changed the latency of read and write in the nvmemul.ini
Are there any other configurations should I do to get correct emulation results?
The program uses malloc() and free(), and I run the script after loading nvmemul module.
following is CPU information