This part causes the stall cycle to always be zero after the counter value exceeds the max value and then increases from 0 in the current code.
Existing code returns 0 without updating previously read counter value when the previously read counter value is larger than the currently read counter value. This case occurs only the counter value exceeds the max value and then starts from 0 again.
This issue can make the stall cycle always zero after the counter value exceeds the max value and may not add NVM latency.
Suppose the Max value of the counter is 100.
After computation,
Last read counter value is 100.
Current read counter value is 3.
Return value is 0.
and then next read results are
Last read counter value is 100.
Current read counter value is 20
Return value is 0.
... (repeat)
Since the last read value is not updated, the result will always return 0 in the current code and NVM latency will not be injected because stall cycle is 0.
So I did an exception handling if the last read value was greater than current counter value, considering that the width of general purpose counter is 40bits.
This part causes the stall cycle to always be zero after the counter value exceeds the max value and then increases from 0 in the current code.
Existing code returns 0 without updating previously read counter value when the previously read counter value is larger than the currently read counter value. This case occurs only the counter value exceeds the max value and then starts from 0 again.
This issue can make the stall cycle always zero after the counter value exceeds the max value and may not add NVM latency.
Suppose the Max value of the counter is 100. After computation, Last read counter value is 100. Current read counter value is 3. Return value is 0.
and then next read results are Last read counter value is 100. Current read counter value is 20 Return value is 0. ... (repeat)
Since the last read value is not updated, the result will always return 0 in the current code and NVM latency will not be injected because stall cycle is 0.
So I did an exception handling if the last read value was greater than current counter value, considering that the width of general purpose counter is 40bits.