HewlettPackard / quartz

Quartz: A DRAM-based performance emulator for NVM
https://github.com/HewlettPackard/quartz
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Will the write latency in NVM only mode or DRAM + NVM (Hybrid) mode be same as the write latency of the DRAM? #31

Closed hkundnani closed 5 years ago

hkundnani commented 5 years ago

Since Quartz doesn't have write memory latency implemented yet as mentioned in Limitations of README file, does this mean that any write operations performed in NVM only mode or DRAM + NVM mode will have same write latency as that of the DRAM?

hadibrais commented 5 years ago

The only kind write latency emulation that is currently supported is provided through the pflush function, which you should call whenever you want to persist the data contained in a cache line. The write latency specified in the configuration file option latency.write is only used for that purpose.

hkundnani commented 5 years ago

@hadibrais Thanks for pointing this out. Since I am not using pflush, can I assume that any writes done in NVM will have the same latency as DRAM since no additional latency has been added by quartz?

hadibrais commented 5 years ago

@hkundnani Yes.

hkundnani commented 5 years ago

@hadibrais Thank you. I will close this issue.