Closed hkundnani closed 5 years ago
The only kind write latency emulation that is currently supported is provided through the pflush
function, which you should call whenever you want to persist the data contained in a cache line. The write latency specified in the configuration file option latency.write
is only used for that purpose.
@hadibrais Thanks for pointing this out. Since I am not using pflush
, can I assume that any writes done in NVM will have the same latency as DRAM since no additional latency has been added by quartz?
@hkundnani Yes.
@hadibrais Thank you. I will close this issue.
Since Quartz doesn't have write memory latency implemented yet as mentioned in Limitations of README file, does this mean that any write operations performed in NVM only mode or DRAM + NVM mode will have same write latency as that of the DRAM?