Fix SLL, SRA, SRL instructions

HoneyGol-Microsystems / vesp-alpha

RISC-V based student processor for embedded applications.

GNU General Public License v3.0

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Closed andreondra closed 1 year ago

medexs commented 1 year ago

Issue fixed. There was a problem in shift amount - it is encoded only in the lower 5 bits of the second operand.