Optimize critical path

[andreondra]

There is too large delay of the critical path of the design: 16.385 ns (must be below 10 ns)

Possible solutions:

• split memories,
• use caches,
• use special LUTs: https://docs.xilinx.com/r/en-US/ug953-vivado-7series-libraries/RAM32M

[medexs]

The problem is most probably the memory - Vivado generates weird memory - changing the size from 1024 words to 64 words lowers the critical path delay to circa 12 ns.

[andreondra]

PIPELINES PIPELINES PIPELINES

[andreondra]

WE NEED DA PIPES

[andreondra]

🎺🎺🎺

[medexs]

Separating the memory did the trick. Around 120 MHz boost.