IBM / AccDNN

A compiler from AI model to RTL (Verilog) accelerator in FPGA hardware with auto design space exploration.
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ips.tcl problem and Vivado error during the generation of Vivado IP with ips.tcl #14

Closed iordanouki closed 4 years ago

iordanouki commented 4 years ago

Hi all,

If you ommit the parameter --profile, the IP core of the accelerator will be generated in the ./build directory, but in the generation at least for the cifar10 example it creates the path to the coe folder and puts a double slash to the path. As a result Vivado cannot find the path. I fixed that problem on my local version of AccDNN.

Also I am getting an error when I am trying to integrate the IP into a block design in Vivado. The error that I am getting is:

Invalid COE file - Unable to open the file

I assume that has to do with the version of Vivado. I'm using 2018.3

Best, Kostas.

Junsong-Wang commented 4 years ago

I didn't try 2018.3, maybe this version has some changes on its format of the coe file. Sometimes the header may be different, https://github.com/IBM/AccDNN/blob/master/util/data.py#L37, you can use your vivado to manually generate an example of coe file, and check what are the differences.

iordanouki commented 4 years ago

I didn't try 2018.3, maybe this version has some changes on its format of the coe file. Sometimes the header may be different, https://github.com/IBM/AccDNN/blob/master/util/data.py#L37, you can use your vivado to manually generate an example of coe file, and check what are the differences.

Thank you!