define variables only if they are not defined yet; add CACHE to MODULES list in software.mk; update MEM submodule; add ifeq USE_DDR to add cache sources - Githubissues

IObundle / iob-cache

Verilog Configurable Cache

MIT License

167 stars 32 forks source link

define variables only if they are not defined yet; add CACHE to MODULES list in software.mk; update MEM submodule; add ifeq USE_DDR to add cache sources #101

Closed JDLopes closed 2 years ago