Latest iob-cache does not compile due to warning being taken as error

[tejas190589]

/Work/ejas/iob-cache$ make sim SIMULATOR=verilator make -C ./hardware/simulation/verilator run make[1]: Entering directory '/home/tejas/Work/ejas/iob-cache/hardware/simulation/verilator' verilator -Wno-WIDTH --trace --cc --exe -I../../../hardware/include -I../../../submodules/LIB/hardware/include -I../../../hardware/testbench ../../../submodules/MEM/hardware/regfile/iob_regfile_sp/iob_regfile_sp.v ../../../submodules/MEM/hardware/ram/iob_ram_2p/iob_ram_2p.v ../../../submodules/MEM/hardware/ram/iob_ram_2p_asym/iob_ram_2p_asym.v ../../../submodules/MEM/hardware/fifo/iob_fifo_sync/iob_fifo_sync.v ../../../submodules/MEM/hardware/ram/iob_ram_sp/iob_ram_sp.v ../../../hardware/src/back-end-native.v ../../../hardware/src/read-channel-native.v ../../../hardware/src/cache-control.v ../../../hardware/src/write-channel-native.v ../../../hardware/src/back-end-axi.v ../../../hardware/src/read-channel-axi.v ../../../hardware/src/onehot-to-bin-encoder.v ../../../hardware/src/write-channel-axi.v ../../../hardware/src/cache-memory.v ../../../hardware/src/front-end.v ../../../hardware/src/replacement-policy.v ../../../hardware/src/iob_cache.v ../../../hardware/src/iob-cache-axi.v testbench.cpp ../../../submodules/AXI/submodules/V_AXI/rtl/axi_ram.v --top-module iob_cache %Warning-PINMISSING: ../../../hardware/src/cache-memory.v:113: Cell has missing pin: 'arst' write_throught_buffer ^~~~~ ... Use "/ verilator lint_off PINMISSING /" and lint_on around source to disable this message. %Warning-PINMISSING: ../../../hardware/src/cache-memory.v:113: Cell has missing pin: 'ext_mem_w_en' write_throught_buffer ^~~~~ %Warning-PINMISSING: ../../../hardware/src/cache-memory.v:113: Cell has missing pin: 'ext_mem_w_data' write_throught_buffer ^~~~~ %Warning-PINMISSING: ../../../hardware/src/cache-memory.v:113: Cell has missing pin: 'ext_mem_w_addr' write_throught_buffer ^~~~~ %Warning-PINMISSING: ../../../hardware/src/cache-memory.v:113: Cell has missing pin: 'ext_mem_r_en' write_throught_buffer ^~~~~ %Warning-PINMISSING: ../../../hardware/src/cache-memory.v:113: Cell has missing pin: 'ext_mem_r_addr' write_throught_buffer ^~~~~ %Warning-PINMISSING: ../../../hardware/src/cache-memory.v:113: Cell has missing pin: 'ext_mem_r_data' write_throught_buffer ^~~~~ %Error: Exiting due to 7 warning(s) make[1]: [Makefile:12: run] Error 1 make[1]: Leaving directory '/home/tejas/Work/ejas/iob-cache/hardware/simulation/verilator' make: [Makefile:18: sim] Error 2

Kindly guide to resolve the same.

[jjts]

Hi Tejas, after merging the only development branch it seems to work now. Please note the testbench does not do much. Please feel free to add to it and submit PRs.

[jjts]

Hi, since I have not heard from you and we updated the verilator testbench on branch "doc" I am closing this issue. Please retry and let us know if any issue.

[tejas190589]

Hello, Yes the compilation issue was surely resolved. Thank you for the help.