Fix unknown outer bank type 0

JeffersonLab / JANA4ML4FPGA

EIC R&D supported project developing ML on FPGA for streaming readout systems

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Fix unknown outer bank type 0 #34

Closed faustus123 closed 1 year ago

faustus123 commented 1 year ago

This fixes the problem identified by Cissie in issue #32 and by Dmitry in issue #31.

It looks like the resolution of this was going to be deprecating or removing the code rather than fixing it, but then issue #31 31 was reopened today. Presumably since it has not yet been resolved in the code. I'm resolving it here since it is a simple fix so issue #31 can be closed permenantly.

cissieAB commented 1 year ago

Sorry to make you confused. Issue #31 was closed by me and reopened by me, too. I closed it because I think we already solved "unknown tag 0", then later I saw this issue also mentioned "err/warn/critical log" so I reopened it.