radxa-rock5: update bl31 and ddr blob to improve stability

[Joshua-Riek]

Hello @RadxaStephen, I'm happy to accept this pull request, except i'm worried about the Rock 5B. As if a user has installed U-Boot to the SPI Flash, when they try to boot from an SD card the SPL and DDR blobs will not match, causing some problems in training the RAM which can lead to an unstable system and cause spontaneous crashing. I've observed this behavior on multiple RK3588 boards for a while now and have not updated the SPL and DDR blobs because of this as I do not want users to encounter problems. Would you or anyone at Radxa have any insight into this matter?

U-Boot logs showing the DDR and SPL not matching:

DDR V1.11 f1474cf52f cym 23/05/09-11:02:36
LPDDR4X, 2112MHz
channel[0] BW=16 Col=10 Bk=8 CS0 Row=17 CS=1 Die BW=16 Size=2048MB
channel[1] BW=16 Col=10 Bk=8 CS0 Row=17 CS=1 Die BW=16 Size=2048MB
channel[2] BW=16 Col=10 Bk=8 CS0 Row=17 CS=1 Die BW=16 Size=2048MB
channel[3] BW=16 Col=10 Bk=8 CS0 Row=17 CS=1 Die BW=16 Size=2048MB
Manufacturer ID:0xff
CH0 RX Vref:28.9%, TX Vref:19.8%,0.0%
CH1 RX Vref:26.3%, TX Vref:21.8%,0.0%
CH2 RX Vref:27.9%, TX Vref:20.8%,0.0%
CH3 RX Vref:28.9%, TX Vref:20.8%,0.0%
change to F1: 528MHz
change to F2: 1068MHz
change to F3: 1560MHz
change to F0: 2112MHz
out
U-Boot SPL board init
U-Boot SPL 2017.09 (May 26 2024 - 19:14:57)
Trying to boot from MMC2
spl: partition error
Trying fit image at 0x4000 sector
## Verified-boot: 0
## Checking atf-1 0x00040000 ... sha256(a7d1d8d191...) + OK
## Checking uboot 0x00200000 ... sha256(db738033cd...) + OK
## Checking fdt 0x0031d008 ... sha256(33d158b4ec...) + OK
## Checking atf-2 0xff100000 ... sha256(4b2065349b...) + OK
## Checking atf-3 0x000f0000 ... sha256(aa71013e72...) + OK
Jumping to U-Boot(0x00200000) via ARM Trusted Firmware(0x00040000)
Total: 822.751 ms

INFO:    Preloader serial: 2
NOTICE:  BL31: v2.3():v2.3-682-g4ca8a8422:derrick.huang, fwver: v1.45
NOTICE:  BL31: Built : 10:11:21, Dec 27 2023
INFO:    spec: 0x1
INFO:    code: 0x88
INFO:    ext 32k is not valid
INFO:    ddr: stride-en 4CH
INFO:    GICv3 without legacy support detected.
INFO:    ARM GICv3 driver initialized in EL3
INFO:    valid_cpu_msk=0xff bcore0_rst = 0x0, bcore1_rst = 0x0
INFO:    l3 cache partition cfg-0
INFO:    system boots from cpu-hwid-0
INFO:    disable memory repair
INFO:    idle_st=0x21fff, pd_st=0x11fff9, repair_st=0xfff70001
ERROR:   dfs get fsp_params[0] error, 0xfead0003 != 0xfead0004
ERROR:   dfs get fsp_params[1] error, 0xa2c != 0xfead0004
ERROR:   dfs get fsp_params[2] error, 0xa34 != 0xfead0004
ERROR:   dfs get fsp_params[3] error, 0xadc != 0xfead0004
ERROR:   loader&trust unmatch!!! Please update loader if need enable dmc
ERROR:   current trust bl31 need match with loader ddr bin V1.13 or newer
ERROR:   current loader need match with trust bl31 V1.38-V1.40
INFO:    BL31: Initialising Exception Handling Framework
INFO:    BL31: Initializing runtime services
WARNING: No OPTEE provided by BL2 boot loader, Booting device without OPTEE initialization. SMC`s destined for OPTEE will return SMC_UNK
ERROR:   Error initializing runtime service opteed_fast
INFO:    BL31: Preparing for EL3 exit to normal world
INFO:    Entry point address = 0x200000
INFO:    SPSR = 0x3c9

[RadxaStephen]

There is one typo. https://github.com/Joshua-Riek/ubuntu-rockchip/blob/main/packages/u-boot-radxa-rk3588/debian/targets.mk#L30

[RadxaStephen]

Hello @RadxaStephen, I'm happy to accept this pull request, except i'm worried about the Rock 5B. As if a user has installed U-Boot to the SPI Flash, when they try to boot from an SD card the SPL and DDR blobs will not match, causing some problems in training the RAM which can lead to an unstable system and cause spontaneous crashing. I've observed this behavior on multiple RK3588 boards for a while now and have not updated the SPL and DDR blobs because of this as I do not want users to encounter problems. Would you or anyone at Radxa have any insight into this matter?

I understand your concern. When loader ddr and bl31 are not matched, the dmc is disabled. I can see that file /sys/class/devfreq/dmc disappear.

To improve DDR stability, I think we need to update the ddr bin.

[Joshua-Riek]

Hmm i updated the bl31 and ddr blobs for the rock 5b. My information was on older blobs from about 6 months ago. Thank you @RadxaStephen very much for your assistance!

[RadxaStephen]

Thanks.