Not working on ESP32S3

[cnadler86]

I could not manage to build a functioning image with the tool on a ESP32S3.

Run vfsmerge --port esp32 --firmware ~/artifacts/firmware.bin --source /home/runner/work/micropython-camera-API/micropython-camera-API/examples --build ~/artifacts
INFO      | Micropython Port: esp32
INFO      | Source folder path: /home/runner/work/micropython-camera-API/micropython-camera-API/examples
INFO      | Firmware path: /home/runner/artifacts/firmware.bin
INFO      | Build path: /home/runner/artifacts
INFO      | Create littlefs image: /home/runner/artifacts/littlefs.img
DEBUG     | Create new filesystem with: 512 blocks of 4096 bytes = 204[8](https://github.com/cnadler86/micropython-camera-API/actions/runs/11321806854/job/31481441652#step:7:9)Kb
INFO      | Add files from /home/runner/work/micropython-camera-API/micropython-camera-API/examples
DEBUG     | Adding /WebCam.py
INFO      | PORTBOARDto /home/runner/artifacts/littlefs.img
INFO      | Merge firmware and littlefs image into /home/runner/artifacts/firmware_lfs.bin
DEBUG     | running: /opt/pipx/venvs/vfs-merge/bin/python -m esptool --chip esp32 merge_bin -o /home/runner/artifacts/firmware_lfs.bin --flash_mode dio --flash_size 4MB 0x1000 /home/runner/artifacts/firmware.bin 0x00200000 /home/runner/artifacts/littlefs.img
esptool.py v4.5
Unexpected chip id in image. Expected 0 but value was [9](https://github.com/cnadler86/micropython-camera-API/actions/runs/11321806854/job/31481441652#step:7:10). Is this image for a different chip model?
Warning: Image file at 0x[10](https://github.com/cnadler86/micropython-camera-API/actions/runs/11321806854/job/31481441652#step:7:11)00 is protected with a hash checksum, so not changing the flash size setting. Use the --flash_size=keep option instead of --flash_size=4MB in order to remove this warning, or use the --dont-append-digest option for the elf2image command in order to generate an image file without a hash checksum
Wrote 0x400000 bytes to file /home/runner/artifacts/firmware_lfs.bin, ready to flash to offset 0x0

I also uploaded the image (which was about 4 MBs and comparing to the original around 1MBs seams to be verry large) and got in Thonny a lot of invalid header errors.

[Josverl]

Hi Christopher,

When I wrote this tool I did not have an ESP32-S3 and never tested that, so first of all , thanks for the test and posting it here.

The origin of the issue is in the fact that the exact position of the filesystem/vfs changes based on the chip (and enabled firmware features) as you can read in the log, the vfs is now located at 0x00200000 , running: /opt/pipx/venvs/vfs-merge/bin/python -m esptool --chip esp32 merge_bin -o /home/runner/artifacts/firmware_lfs.bin --flash_mode dio --flash_size 4MB 0x1000 /home/runner/artifacts/firmware.bin 0x00200000 /home/runner/artifacts/littlefs.img

As it is throwing all sorts of errors, That is probably not the correct location for the S3.

What is the flash size of your device ? currently the tool assumes 4MB of flash

The Layout of the image that is being generated in your case is something like :

[start address = 0x1000] 
|-----------------------MicroPython Firmware -------------------------|

[vfs address = 0x00200000 ]
|-----File content --------------------------000000000 zero padded0000000000000000000000 (512 blocks of 4096 bytes)|

I have documented how you can find the values for other ports/boards in : https://github.com/Josverl/vfs_merge/blob/main/vfs_merge/portboard_disk.md

(should have linked that from the readme ) if we can figure out what values to use , they can be added to / updated in : https://github.com/Josverl/vfs_merge/blob/main/vfs_merge/portboard_disk.py

[cnadler86]

Hi Jos, thanks for your fast response.

Looking at the build log, I found out that the start is right, but the size if the partition is 6MB (0x600000 in partitions-8MiB.csv):

Partition table binary generated. Contents:
*******************************************************************************
# ESP-IDF Partition Table
# Name, Type, SubType, Offset, Size, Flags
nvs,data,nvs,0x9000,24K,
phy_init,data,phy,0xf000,4K,
factory,app,factory,0x10000,1984K,
vfs,data,fat,0x200000,6M,
*******************************************************************************

I am using the 8MB-Flash:

CONFIG_ESPTOOLPY_FLASHSIZE_4MB=
CONFIG_ESPTOOLPY_FLASHSIZE_8MB=y
CONFIG_ESPTOOLPY_FLASHSIZE_16MB=
CONFIG_PARTITION_TABLE_CUSTOM=y
CONFIG_PARTITION_TABLE_CUSTOM_FILENAME="partitions-8MiB.csv"

I am passing the merged binary created by the make ... all command, or should I pass only the micropython binary before merge?

[cnadler86]

I also saw now that the command is using flash mode dio, the esp32s3 has normally qio flash, at least mine.

Will try to adapt the code and I will let you know, if I succeed.