Closed sjkelly closed 1 year ago
these have a 35T FPGA, so a different PnR and boundary scan gateware is required. This variant also has less BRAM so we adjust the DMA buffer sizes accordingly.
these have a 35T FPGA, so a different PnR and boundary scan gateware is required. This variant also has less BRAM so we adjust the DMA buffer sizes accordingly.