This PR updates the Bootrom to support UART with asynchronous peripheral clock. This update is fully tested on FPGA: The peripheral clock is at 16MHz / 60-degree phase difference, with clock division ratio of 32 (500K Baud). The transmission of 1MB data does not show any error. (Speed: ~15KB/s)
Furthermore, this PR update some files to utilize the uniform cluster_icache repo that also used by snax cluster.
This PR updates the Bootrom to support UART with asynchronous peripheral clock. This update is fully tested on FPGA: The peripheral clock is at 16MHz / 60-degree phase difference, with clock division ratio of 32 (500K Baud). The transmission of 1MB data does not show any error. (Speed: ~15KB/s)
Furthermore, this PR update some files to utilize the uniform cluster_icache repo that also used by snax cluster.