We have noticed on some newer Intel machines, particularly on Xeon Gold, that the APIC clock interrupt almost always happens exactly during the single-step. This causes some problems with naive breakpoint implementations and, furthermore, causes a lot of unnecessary VM-exits.
Therefore, we suggest to delay this until exiting the single-step. Perhaps this warrants further discussion.
We have noticed on some newer Intel machines, particularly on Xeon Gold, that the APIC clock interrupt almost always happens exactly during the single-step. This causes some problems with naive breakpoint implementations and, furthermore, causes a lot of unnecessary VM-exits.
Therefore, we suggest to delay this until exiting the single-step. Perhaps this warrants further discussion.