Improves loopback bandwidth measurement result with respect to simplex bandwidth result (still slower with an approximate factor of 2). There is a latency between the moment a data transaction is possible to when it's carried out, which leads to a very uneven data transport. This, in turn, yields suboptimal bandwidth performance for loopback setup.
Refactors code which does not fit standard code styling and removes unnecessary dead code accordingly
This patch helps to enable bi-directional PCIe communication at PCIe gen2 speed grade
Major change in this patch is the enabling of chnl_recv() scatter-gather list first in the case of loopback.
Some other changes include splitting TX and RX into two separate FSMs in two always blocks as you can see in chnl_tester.v
Also, I need to give credit to @marzoul for https://github.com/KastnerRG/riffa/pull/18 which I have already included in this patch altogether.
TODO
Improves loopback bandwidth measurement result with respect to simplex bandwidth result (still slower with an approximate factor of 2). There is a latency between the moment a data transaction is possible to when it's carried out, which leads to a very uneven data transport. This, in turn, yields suboptimal bandwidth performance for loopback setup.
Refactors code which does not fit standard code styling and removes unnecessary dead code accordingly