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KastnerRG / riffa

The RIFFA development repository
https://riffa.ucsd.edu
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calculation of config_link_rate is off for VC709 #39

Open hmaarrfk opened 5 years ago

hmaarrfk commented 5 years ago

It seems that there is a typo here https://github.com/KastnerRG/riffa/blob/4e9d3c8d81b164e291f343bf6e0417c9241e6bee/fpga/xilinx/vc709/riffa_wrapper_vc709.v#L286

I think it should be 

    assign config_link_rate = CFG_CURRENT_SPEED[2]? 2'b11 : CFG_CURRENT_SPEED[1] ? 2'b10 : 2'b01;

According to the Ultrascale datasheet

Current Link Speed
This signal outputs the current link speed from Link Status
register bits 1 down to 0. This field indicates the negotiated
Link speed of the given PCI Express Link.
• 001b: 2.5 GT/s PCI Express Link
• 010b: 5.0 GT/s PCI Express Link
• 100b: 8.0 GT/s PCI Express Link

I think you are trying to change the 1 hot bits to a 2 bit unsigned number right?