[x] Add MEIE bit to mie register. Leave MSIE and MTIE hardwired to 0.
[x] Route external irq_i to MEIP bit in mip register.
[x] Create a signal irqPending = mstatus.mie & (MEIE & MEIP).
[x] When irqPending is asserted when fetching an instruction, take the interrupt.
Make sure that mcause is set to the appropriate interrupt source number!
EXTRA CREDIT
This is required by the v1.9 priv specs, but I'm making this optional for the KCP53000 because, frankly, this is rediculously hard to get right.
[x] Confirm that external IRQs take precedence over traps like illegal instruction traps.
[x] Find a way to not trash mcause in this case. The simplest possible approach I can think of is to restart the faulting instruction upon MRET-ing from the interrupt handler, and hope another IRQ doesn't come along.
mstatusregister.mieregister. Leave MSIE and MTIE hardwired to 0.mipregister.mcauseis set to the appropriate interrupt source number!EXTRA CREDIT This is required by the v1.9 priv specs, but I'm making this optional for the KCP53000 because, frankly, this is rediculously hard to get right.
mcausein this case. The simplest possible approach I can think of is to restart the faulting instruction upon MRET-ing from the interrupt handler, and hope another IRQ doesn't come along.