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KhronosGroup / SPIRV-LLVM-Translator

A tool and a library for bi-directional translation between SPIR-V and LLVM IR
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[NFC] Document intrinsic lowering #2543

Closed LU-JOHN closed 1 week ago

LU-JOHN commented 2 months ago

Document how llvm intrinsics are lowered by SPIRV-LLVM-Translator.

asudarsa commented 2 months ago

Thanks so much for adding this @LU-JOHN High level comment - I think you should add this under the 'docs' directory.

I will add my feedback in a bit.

Thanks

LU-JOHN commented 2 months ago

Thanks for working on this! I'll post extra comments later. There are 2 cases missing:

  1. Just mapping on a SPIR-V instruction from either core spec or extension. Q: do we want to mention this case?
  2. Some emulation done straight in SPIR-V writer, so not intermediate transformation is being done.

General Q: do we want to unify approaches? All of them have pros and cons, for example if we need to do some types adjustments, it's either to do it just during SPIR-V generation as we create module from scratch, on LLVM IR level replacing types is much harder. Also while inserting definitions of intrinsic function overloads is also possible, do we really want to do it in every case as we would need to insert every possible type combination?

Another Q: do we want (and if yes or no - mention it in the document) emulate some intrinsic that are being mapped on OpenCL lib calls or extension instruction in case, if lets say we know, that target device supports only native builtins or doesn't support a particular extension?

Thanks for working on this! I'll post extra comments later. There are 2 cases missing:

  1. Just mapping on a SPIR-V instruction from either core spec or extension. Q: do we want to mention this case?
  2. Some emulation done straight in SPIR-V writer, so not intermediate transformation is being done.

General Q: do we want to unify approaches? All of them have pros and cons, for example if we need to do some types adjustments, it's either to do it just during SPIR-V generation as we create module from scratch, on LLVM IR level replacing types is much harder. Also while inserting definitions of intrinsic function overloads is also possible, do we really want to do it in every case as we would need to insert every possible type combination?

Another Q: do we want (and if yes or no - mention it in the document) emulate some intrinsic that are being mapped on OpenCL lib calls or extension instruction in case, if lets say we know, that target device supports only native builtins or doesn't support a particular extension?

  1. I've documented lowering with an instruction in an extension.
  2. Emulation done in SPIRVWriter.cpp.

I think we do want to simplify the lowering process, but that is a bigger discussion than what this document addresses. I'm only trying to give an overview of what is currently done.

LU-JOHN commented 2 months ago

Thanks so much for adding this @LU-JOHN High level comment - I think you should add this under the 'docs' directory.

I will add my feedback in a bit.

Thanks

Moved to docs directory.