Lattice ECP FPGA family pin descriptions are used to auto-generate the schematic symbols.
This re-uses the Xilinx symbol generator from #293
Currently all ECP5U, ECP5UM and ECP5UM-5G are working, ECP3 devices have similar CSV files and should work as well.
The ICE FPGA series has different a pin descripion format.
Lattice ECP FPGA family pin descriptions are used to auto-generate the schematic symbols. This re-uses the Xilinx symbol generator from #293 Currently all ECP5U, ECP5UM and ECP5UM-5G are working, ECP3 devices have similar CSV files and should work as well. The ICE FPGA series has different a pin descripion format.
Example![ecp5-5g](https://user-images.githubusercontent.com/15271463/60931715-051ecf00-a2bb-11e9-94cb-8f5b3bb03a5d.png)